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ECE :: Microprocessors

Microprocessors - Section 1
Microprocessors - Section 2
Microprocessors - Section 3
Microprocessors - Section 4
Microprocessors - Section 5
Microprocessors - Section 6
Microprocessors - Section 7
Microprocessors - Section 8
Microprocessors - Section 9
Microprocessors - Section 10
Microprocessors - Section 11
Microprocessors - Section 12
Microprocessors - Section-13

  1. Assertion (A): A two byte instruction of 8085 has an operation code in first byte and operand / address in the second byte.

    Reason (R): If an instruction is too long it is possible to reduce its length by a number of methods.

    2. A.
    Both A and R are correct and R is correct explanation of A
    B.
    Both A and R are correct but R is not correct explanation of A
    C.
    A is correct R is wrong
    D.
    A is wrong R is correct

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  2. In computers the size of secondary memory is usually much larger than that of primary memory.

    3. A.
    True
    B.
    False

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  3. In 8085

    4. A.
    all operations are on 8 bit data
    B.
    majority of operations are on 8 bit data
    C.
    all operations are on 8 bit or 4 bit data
    D.
    either (a) or (c)

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  4. Which of the following directives in 8085 causes two bytes to be reserved in the memory?

    5. A.
    D S
    B.
    D B
    C.
    D W
    D.
    E Q U

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  5. In 8086 the flag which enables or disables external interrupts is

    6. A.
    IF
    B.
    DF
    C.
    TF
    D.
    CF

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  6. The language PL / I has

    7. A.
    one character set having 60 characters
    B.
    one character set having 48 characters
    C.
    one character set having 60 characters and another character set having 48 character
    D.
    none of the above

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  7. DOS has a command named ' DIRECTORY '.

    8. A.
    True
    B.
    False

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  8. In floating point representation decimal number 13.5 is

    9. A.
    1101.1
    B.
    1.1011 x 23
    C.
    0.11011 x 24
    D.
    11.011 x 22

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  9. Assume that x = 7, the Java operation x = x - means that final value of x is

    10. A.
    7
    B.
    -1
    C.
    6
    D.
    -6

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  10. For most static RAM the write pulse width should be at least

    11. A.
    10 ns
    B.
    60 ns
    C.
    300 ns
    D.
    1 μs

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