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Discussion :: GATE ECE

  1. In the circuit shown below, Q1 has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If Vcc is +5 V, X and Y are digital signals with 0 V as logic 0 and Vcc as logic 1, then the Boolean expression for Z is

    2. A.
    XY
    B.
    .
    C.
    .
    D.
    .

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    Workspace

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    Answer : Option B

    Explanation :

    -NA-

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