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Digital Electronics - Section 11
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Digital Electronics - Section 18
Digital Electronics - Section 19
Digital Electronics - Section 20
Digital Electronics - Section 21
Digital Electronics - Section 22
Digital Electronics - Section 23
Digital Electronics - Section 24
Digital Electronics - section-25
Digital Electronics - Section-26
  1. The output of a JK flipflop with asynchronous preset and clear inputs is '1'. The output can be changed to '0' with one of the following conditions
    2. A.
    By applying J = 0, K = 0 and using a clock
    B.
    By applying J = 1, K = 0 and using the clock
    C.
    By applying J = 1, K = 1 and using the clock
    D.
    By applying a synchronous preset input

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  2. A full adder logic circuit will have
    3. A.
    Two inputs and one output
    B.
    Three inputs and three outputs
    C.
    Two inputs and two outputs
    D.
    Three inputs and two outputs

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  3. For which of the following purpose Karnaugh map is used
    4. A.
    Reducing the electronic circuits used
    B.
    To map the given Boolean logic function
    C.
    To minimize the terms in a Boolean expression
    D.
    To maximize the terms of a given a Boolean expression

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  4. Which of the following is a universal logic gate?
    5. A.
    OR
    B.
    AND
    C.
    XOR
    D.
    NAND

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  5. How many two input AND and OR gates are required
    6. A.
    2,2
    B.
    2,3
    C.
    3,3
    D.
    None of these

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  6. To construct mod 30 counter __________ number of flip-flops are required
    7. A.
    5
    B.
    6
    C.
    4
    D.
    8

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  7. For which of the following two inputs, The NOR gate output will be low
    8. A.
    01
    B.
    10
    C.
    11
    D.
    all the above

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  8. The number 140 in octal is equivalent to
    9. A.
    (96)10
    B.
    (86)10
    C.
    (90)10
    D.
    None of these

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  9. __________ is known as process of entering data into a ROM
    10. A.
    Burning in the ROM
    B.
    Programming the ROM
    C.
    Changing the ROM
    D.
    Charging the ROM

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  10. In a positive logic system, logic state 1 corresponds to___________
    11. A.
    Positive voltage
    B.
    Higher voltage level
    C.
    Zero voltage level
    D.
    Lower voltage level

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