ECE :: Digital Electronics
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A 4 bit modulo 16 ripple counter uses JK flip-flops. If the propagation delay of each FF is 50 ns. The max. clock frequency that can be used is equal to
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As the number of flip flops are increased, the total propagation delay of
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In a 4 input OR gate, the total number of High outputs for the 16 input states are
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For the ring oscillator shown in the figure, the propagation delay of each inverter is 100 pico sec. What is the fundamental frequency of the oscillator output __________
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Which of the following is not a characteristic of a flip flop?
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For AB + A C + BC = AB + A C the dual form is
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A DAC has full scale output of 5 V. If accuracy is ± 0.2% the maximum error for an output of 1 V is
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= 10 mV.