ECE :: Digital Electronics
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Four MSI TTL 4-bit ripple counters are cascaded to form a 16-bit binary counter. Its propagation delay is about __________ nanoseconds.
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The Boolean function A + BC is reduced form of
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To convert JK flip flop to D flip flop
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Read cycle is always followed by (during instructions execution)
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If tp is the pulse width, Δt is the propagation delay, T is period of pulse train then the following condition can avoid the race around condition
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Which of the following pairs of octal and binary numbers are not equal?
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With a JK master-slave flip-flop the master is clocked when the clock is __________ , and the slave is triggered when the clock is __________ .
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The communicating capacitor reduces turn on time because
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