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ECE :: Digital Electronics

  1. A 4 bit binary adder has 4 full adders.

  2. A.
    True
    B.
    False

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  3. In floating point representation, the accuracy is

  4. A.
    10 bit
    B.
    9 bit
    C.
    8 bit
    D.
    6 bit

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  5. The logic circuit in the given figure realizes the function

  6. A.
    (A + B + C) (D E)
    B.
    (A + B + C) (D E)
    C.
    (A + B + C) (D E)
    D.
    (A + B + C) (D E)

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  7. The PC contains 0450 H and SP contains 08D 6 H. What will be content of P and SP following a CALL to subroutine at location 02 AFH?

  8. A.
    0453 H, 08 D 8 H
    B.
    0453 H, 08 D 4 H
    C.
    02 AFH, 08 D 8 H
    D.
    02 AFH, 08 D 4 H

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  9. An n bit ADC using Vr as reference has a resolution (in volts) of

  10. A.
    B.
    Vr(n)
    C.
    D.
    2Vr(n)

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  11. The sum of 11101012 and 110112 in decimal form will be

  12. A.
    65
    B.
    75
    C.
    85
    D.
    95

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  13. Binary 1111 when added to binary 11111, the result in binary is

  14. A.
    111111
    B.
    1111
    C.
    1000
    D.
    10000

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  15. In the 2's complement Adder-Subtractor

  16. A.
    sign magnitude numbers represent negative numbers
    B.
    the sign magnitude numbers have "1" as leading bit
    C.
    the sign magnitude numbers have '0' as leading bit
    D.
    2's complement represents positive numbers

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  17. The widely used binary multiplication method is

  18. A.
    repeated addition
    B.
    add and shift
    C.
    shift and add
    D.
    any of the above

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  19. Which of the following logic family is fastest of all?

  20. A.
    TTL
    B.
    RTL
    C.
    DCTL
    D.
    ECL

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