ECE :: Digital Electronics
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The product of which of the following gives the figure of merit of a logic family?
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A JK flip flop can be converted to D flip flop by
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In a 4 bit parallel in parallel out shift register A = 1, B = 1, C = 0, D = 1. The data output after 3 clock pulses is
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Assertion (A): A 4 input variable logic circuit can be implemented using a 8 : 1 multiplexer.
Reason (R): When a multiplexer is used as a logic function generator, the logic design is simple.
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A 6 MHz channel is used by a digital signalling system initializing four-level signals. The maximum possible transmission rate is
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Data can be changed from spatial code to temporal code and vice-versa by using
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In 8156, the lower times byte is addressed with 24 H, and the upper times byte with
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In the CMOS inverter
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Which of the following is incorrect?