ECE :: Digital Electronics
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4 bit ripple counter and 4 bit synchronous counter are made using flip-flop having a propagation delay of 10 ns each. If the worst case delay in the ripple counter and the synchronous counter be R and S respectively, then
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A NOR gate has 3 inputs A, B, C. For which combination of inputs is output HIGH
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The Boolean function/implemented in the figure using two I/P multiplexers is