ECE :: Digital Electronics
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To convert SR latch to D latch
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If a RAM has 34 bits in its MAR and 16 bits its MAR, then its capacity will be
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The output voltage of 5-bit D/A binary ladder that has a digital input of 11010 (Assuming 0 = 0 V and 1 = + 10 V) is
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The inputs to a 4 channel MUX have the following bandwidths. Channel 1-50 Hz, channel 2-200 Hz. Channel 3-75 Hz. Channel 4-90 Hz. The theoretical minimum sampling rate of the MUX is
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Two numbers in excess-3 code are added and the result is less than 8. To get equivalent binary
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Flow charts that contain decision symbol
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The ASCII code is for information interchange by a binary code for
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Assertion (A): CMOS devices have very low power consumption
Reason (R): CMOS devices have high noise margin.
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Which is known as flash converter?
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