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ECE :: Digital Electronics

Digital Electronics - Section 1
Digital Electronics - Section 2
Digital Electronics - Section 3
Digital Electronics - Section 4
Digital Electronics - Section 5
Digital Electronics - Section 6
Digital Electronics - Section 7
Digital Electronics - Section 8
Digital Electronics - Section 9
Digital Electronics - Section 10
Digital Electronics - Section 11
Digital Electronics - Section 12
Digital Electronics - Section 13
Digital Electronics - Section 14
Digital Electronics - Section 15
Digital Electronics - Section 16
Digital Electronics - Section 17
Digital Electronics - Section 18
Digital Electronics - Section 19
Digital Electronics - Section 20
Digital Electronics - Section 21
Digital Electronics - Section 22
Digital Electronics - Section 23
Digital Electronics - Section 24
Digital Electronics - section-25
Digital Electronics - Section-26

  1. In a sequential circuit the output at any instant depends on

    2. A.
    present inputs only
    B.
    past inputs only
    C.
    past outputs only
    D.
    past output and present input

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  2. Point out the wrong statement, Sequential logic circuit is

    3. A.
    one that requires a clock to change states
    B.
    one in which past affects the present states
    C.
    one whose outputs changes immediately when the inputs change
    D.
    also called clock logic or synchronous logic

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  3. In 8085 microprocessor, what is the memory address stored on the stack, when the program is interrupted?

    4. A.
    0210 H
    B.
    0.211 H
    C.
    0118 H
    D.
    020 FH

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  4. The decimal equivalent of ABC16 is

    5. A.
    348
    B.
    2583
    C.
    2748
    D.
    33

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  5. In parallel in-parallel out shift register all bits are loaded and read simultaneously.

    6. A.
    True
    B.
    False

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  6. One XOR gate can work as

    7. A.
    one bit magnitude comparator
    B.
    two bit magnitude comparator
    C.
    either (a) or (b)
    D.
    neither (a) nor (b)

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  7. A Charge Couple Device (CCD) is a

    8. A.
    RAM
    B.
    sequential accessed memory
    C.
    content addressable memory
    D.
    read only memory

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  8. In an R-S latch, race condition occurs when

    9. A.
    R is low and S is high
    B.
    R and S are high
    C.
    R and S are low
    D.
    R is high and S is low

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